Optimised CORDIC‐based atan2 computation for FPGA implementations

Fpga Implementations of Neural Networks Fpga Implementations of Neural Networks

This introductory chapter reviews the basics of artificial-neural-network theory, discusses various aspects of the hardware implementation of neural networks (in both ASIC and FPGA technologies, with a focus on special features of artificial neural networks), and concludes with a brief note on performanceevaluation. Special points are the exploitation of the parallelism inherent in neural netwo...

Optimised resource construction for verifiable quantum computation

Recent developments have brought the possibility of achieving scalable quantum networks and quantum devices closer. From the computational point of view these emerging technologies become relevant when they are no longer classically simulatable. Hence a pressing challenge is the construction of practical methods to verify the correctness of the outcome produced by universal or non-universal qua...

Disparity Map Computation Speed Comparison for CPU, GPU and FPGA Implementations

1 Institute of Automation, University of Bremen, e-mail: [email protected] 2 Facultatea de Electronică şi Telecomunicaţii, Departamentul Electronică Aplicată, e-mail: [email protected] 3 Facultatea de Electronică şi Telecomunicaţii, Departamentul Comunicaţii, e-mail: [email protected] Abstract – In this paper a comparison of the processing speed of the disparity map computation usin...

Hash Algorithms for Cryptographic Protocols: Fpga Implementations

Synthesis of Secure FPGA Implementations

This paper describes the synthesis of Dynamic Differential Logic to increase the resistance of FPGA implementations against Differential Power Analysis. The synthesis procedure is developed and a detailed description is given of how EDA tools should be used appropriately to implement a secure digital design flow. Compared with an existing technique to implement Dynamic Differential Logic on FPG...